How to Route of Clock Signal?
In this article, we are going to discuss about route of clock signal.
Depending on the length of the clock o/p line, one of the 2 termination schemes should be used.
Types of Clock Lines:
Short Clock Lines –
When a Clock lines one inch or less in length can be connected directly from the clock output pin to the clock load. A series damping resistor is not required for short traces (one inch or less). Matching the output driver impedance plus the series damping resistor to the PCB trace is not necessary.
Long Clock Lines –
When a Clock lines one inch & longer must be treated as a transmission line. A series damping resistor must be used to match the impedance of the output driver plus the damping resistor to the PCB trace. Matching the impedance will minimize the EMI of the system & eliminate signal reflections back to the driver. The clock line width should be chosen to produce a 60O trace impedance. The PCB trace width varies with the type of material used. Locate oscillators & clk circuits near the center of the PCB. This location minimizes coupling to I/O runs and places the HF sources in the center of the power & ground distribution system. Separate Digital Interface circuitry (higher speed, Place the microcontroller clock first on the PCB. At LF, the microcontroller clock is one of the nosiest areas of the circuit board. Add a ground run shadow to the backside of the board. This is the most effective noise-reduction method. Where this is not possible, the ground run should be adjacent to the PCB on the same side. Where the clock run is adjacent, a II ground is recommended, causing clock runs between two ground runs.
Below is the Checklist for Noise Reduction Techniques at the time of Designing with Clocks
· When there is Op – Amp in the design, then terminate unused op-amps in dual and quad packs by grounding the positive input and connecting the – input to the output.
· Do the filter all signals leaving a noisy environment & filter all signals entering the board
· Place Input and output drivers near where they leave the board.
· Place the crystals flush to PCB and do all ground them.
· Place the clock at the center of the board, while the clock goes off the board, and place the clock near the connector.
· Separate the circuits on the board based on their frequency & current switching levels.
· Divide the noisy and quiet leads.
· Always avoid using serpentine routing and clock traces should be as straight as possible.
· Don’t use multiple signal layers for clock signals.
· Don’t use vias in the clock terminal line, while vias can contribute impedance change & reflection.
· Route the clock trace on the microstrip (try to route on top layer) to minimize the use of vias & delays, while air is the dielectric material and Air has the lowest dielectric constant (Er = 1).
· Use a ground plane next to the outer layer to minimize noise, when using the inner layer for routing the clock trace, sandwich the layer by ground planes to reduce delay.
· First separate digital and analog lines and route the signals away from each other.
· Place the clock & digital signal lines must be placed as far away as analog input & voltage reference pins.
· Always Clock circuits should be placed away from I/O cables.
· The length of sensitive leads such as decoupling capacitor should be of short.
· Use all power and ground pins of an IC.
· Use twist noisy leads together to cancel mutual coupling,
· Keep a ground lead between low-level signal leads and noisy leads in the same connector like a ribbon cable.
· Place high-speed lines short and direct.
· Don’t use running traces under the crystal.
· Sensitive traces must not be run in parallel with high current, fast switching signals.
· Critical traces must have wide trace width and should be guarded with a ground on each side of the trace.